Buridan’s Principle
📜 Abstract
Buridan’s principle asserts that a discrete decision based upon input having a continuous range of values cannot be made within a bounded length of time. It appears to be a fundamental law of nature. Engineers aware of it can design devices so they have an infinitesimal probability of not making a decision quickly enough. Ignorance of the principle could have serious consequences.
✨ Summary
The paper formalizes Buridan’s ass as a general continuity problem: a physical or computational system cannot guarantee a bounded-time transition from a continuous range of possible inputs to one of a discrete set of outputs. Lamport applies this argument to railroad-crossing decisions, collision avoidance, human hesitation, airplane navigation, asynchronous computer interrupts, synchronizers, and quantum-mechanical measurement. In computer engineering, the principle corresponds to the arbiter and metastability problem. The practical response is not to eliminate the theoretical possibility of delay, but to allow additional settling time so that the probability of an excessively long metastable interval becomes negligible.
Subsequent work developed the mathematical treatment of this phenomenon. Lamport and Richard S. Palais’s later paper, “On the Glitch Phenomenon,” explicitly formalized the related synchronizer-glitch problem and connected it to devices deciding between asynchronous events. (researchgate.net) The principle has also been cited in work on theorem proving for digital control logic interacting with continuous dynamics, where it is treated as a constraint relevant to cyber-physical-system analysis. (researchgate.net) In philosophy, later research has used Lamport’s principle to analyze indecision, responsibility, and decision-making under equally balanced alternatives. (cambridge.org)
The paper’s industry impact is best characterized as conceptual and educational: it explains why asynchronous inputs and metastability cannot be handled with an absolute bounded-time guarantee, while practical circuit design uses synchronization stages and timing margins to make failures extremely unlikely. I found no reliable evidence attributing a specific commercial product or industry standard directly to this paper; the underlying arbiter and synchronizer engineering literature predates its 2012 journal publication. (en.wikipedia.org)