paper

A Fast String Searching Algorithm

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📜 Abstract

An algorithm is presented that searches for the location, "i," of the first occurrence of a character string, "pat," in another string, "string." During the search operation, the characters of pat are matched starting with the last character of pat. The information gained by starting the match at the end of the pattern often allows the algorithm to proceed in large jumps through the text being searched. Thus the algorithm has the unusual property that, in most cases, not all of the first i characters of string are inspected. The number of characters actually inspected (on the average) decreases as a function of the length of pat. For a random English pattern of length 5, the algorithm will typically inspect i/4 characters of string before finding a match at i. Furthermore, the algorithm has been implemented so that (on the average) fewer than i + patlen machine instructions are executed. These conclusions are supported with empirical evidence and a theoretical analysis of the average behavior of the algorithm. The worst case behavior of the algorithm is linear in i + patlen, assuming the availability of array space for tables linear in patlen plus the size of the alphabet.

✨ Summary

The paper introduced the Boyer–Moore string-searching algorithm, using right-to-left pattern comparison together with preprocessing tables that permit substantial shifts after mismatches. It established strong average-case performance, including behavior that can inspect fewer text characters than the text position being searched, while retaining linear worst-case behavior under the stated assumptions. (cs.utexas.edu)

Subsequent research treated Boyer–Moore as a central baseline for practical string searching and developed variants such as Horspool’s simplified algorithm and later optimized families of skip-loop methods. (onlinelibrary.wiley.com) The algorithm also became part of the practical background for later systems research, including hardware acceleration of string matching in programmable network ASICs, where it is discussed as a well-known approach and as a comparison point for newer methods. (cs.yale.edu)